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21 Cards in this Set
- Front
- Back
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IF
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Instruction fetch from memory
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ID
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Instruction decode & register read
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EX
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Execute operation or calculate address
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DM
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Access memory operand
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WB
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Write result back to registers
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Super-pipeline Machines
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machines that divide stages of a pipeline to sub-stages to increase the number of supported instructions
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Superscalar Machines
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machines that allow several instructions to be initiated simultaneously and executed independently
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Static Multiple Issue
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uses smart compiler to detect and resolve hazards
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Dynamic Multiple Issue
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uses hardware to detect and resolve hazards at runtime
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Dynamic Scheduling
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hardware support for reordering the order of instructions
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Execution time for non pipelined |
E = nkt or t*# of instructions |
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Execution time for pipelined |
E = (k + n -1)t |
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Instruction are done on one cycle for _______ |
single cycle |
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Dependencies without forward |
place ID and WB on same cycle |
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Dependencies with forward |
output of EX to input of EX (arithmetic) output of DM to input of EX (load/store) |
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Instruction Memory
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provides read access to instructions
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Register File
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output contents within registers
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ALU
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calculate arithmetic results
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Data Memory
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write register value to memory
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Sign-extend
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sign-extends 16 bit input to 32 bit output
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Handling Exceptions |
1. Save offending address to EPC (Exception Program Counter) 2. Save indication of the problem in Cause Register 3. Jump to handler |
