Long Answer Questions Test1

Front 1

Why did CMOS transistors relpace TTL logic?

Back 1

VLSI chips use CMOS transistors because bipolar transistors always draw some current, while CMOS only draws current when the output state changes

Front 2

Describe DRAM

Back 2

Dynamic Random Access Memory can be formed by a transistor and a cap. It has a very high density. The storage is dynamic so it refreshed over time. The cap discharges a refresh cycle would refresh all memories.

Front 3

Describe SRAM

Back 3

Static Random Access Memory is a flip flop, it will hold content until rewritten or power off. It is made of 6 transistors so it is larger then DRAM. Used as a scratch pad during program execution.

Front 4

LIFO SRAM

Back 4

Used as an address stack to store adresses during a subroutine call, so the program execution can continue once the instruction is returned. The address is pushes, then stacked and popped.

Front 5

CAM SRAM

Back 5

Is used to translate page addresses to chip addresses.

Front 6

FIFO SRAM

Back 6

Stores instructions in the instruction queue

Front 7

Shift Register SRAM

Back 7

sterilize data.

Front 8

EPROM

Back 8

it is controlled by a gate and can be used to turn the transistor on or off. During Programming, the charge is increased to logic 1 by using a reference greater then 5V. When erasing the logic is at 0.

Front 9

Flash

Back 9

Same as EPROM but is orientated to blocked of 64 bytes at the same time. Larger and much faster.

Front 10

ROM

Back 10

Densest memory, for hardcoded program. It consist of a single transistor and is programmed to be 0 or 1 in manufacturing.

Front 11

What is a Configuration word?

Back 11

In order to use physical hardware, the configuration word is hardwired during program and it assist with communication. It well tell you what oscillator is being used, how to power reset and how to enable and disable characteristics. This is found in the program memory

Front 12

What are the 2 types of oscillators?

Back 12

Crystal: this is the most accurate, uses two caps to stabilize the frequency.

Resistor/Cap: the cheaper less accurate alternative, frequency depends on the resistance and capacitance, the operating temp and the voltage. Only used for low performance applications.

Front 13

Describe the reset sequence when a reset pulse occurs

Back 13

*The internal memory and peripherals might reset.

Starts a set sequence

1. load the configuration word

2. set the parameters according to the word

3. fetches the first instruction

Front 14

What is the Difference between Hard and soft restart?

Back 14

A hard or external reset: initiates the reset sequence. This is ideal for development to reset the processor

A soft reset cause the program counter to reset to the first instruction but does not change the hardware configuration.

Front 15

What impact does standby and system voltage have on low application?

Back 15

low applications have a sleep mode to save battery life. by decreasing the system clock to 0. Only the essentials are needed to wake the micro controller.

Front 16

What is the key of in-circuit programming?

Back 16

it allows the micro controller to be reprogrammed while still installed in the circuit.

Front 17

What is an embedded controller parallel port?

Back 17

They are a 1 byte port and they can be selected as input or output

Front 18

What is Tri-state logic?

Back 18

Tri state buffering allows for a third state. A high impedance state that allows multiple devices to to use a common bus.

Front 19

What are the key features of memory mapped I/O

Back 19

No special instructions are needed.

Memory mapped I/O treat locations as part of the register memory address space.

Front 20

What are the main parts of the micro controller

Back 20

CPU

ROM

RAM

Timers

Interrupt

I/O ports

Analog Digital converters

Digital Analog converters

Serial Interfacing ports

Front 21

Describe VLSI

Back 21

Functional: represents how the chip functions which are defined and verified by simulation

Logic: individual modules are implemented at the gate level by simulation

Physical: consist of a design and verification of detailed boolean descriptions

Front 22

How is VHDL used for the design process?

Back 22

It is used for the design process as a low estimation at the system specs level. it means complete redesign if there is not enough actual surface area at the physical level.

Front 23

What are the differences between the 2 main ISA?

Back 23

CISC: reduced number of instructions per program

many instructions are preforming multiple operations

hardware has to handle large instruction set

RISC: reduce ISA

provides minimal and simple same length instructions

reduces hardware complexity, increase software complexity

Front 24

What was the driving force for micro-controllers

Back 24

increase density DRAMs. double's in density every 18 months

Front 25

How did SSI transition to VLSI?

Back 25

SSI started with individual gates

I/O interfaces were then standardized to help third parties develop interfaces.

MSI was introduced in the form of octal latches which reduces SSI gates. this allowed gates to be implemented.

The next progression was electronic calculators.

Intel 1101 was invented in the late 70s

Front 26

What are the buses

Back 26

Bus: electronic highway that allows data to move between devices

Address: Allows the CPU or DMA to address memory and peripherals

Data: allows data to move between devieces

Control: controlled the address and data bus

Front 27

What do early chips require to operate?

Back 27

They required multiple chips because there were minimal gates per chip.

Front 28

What are the key features of CISC

Back 28

Complex instructions

Variable length instruction

Complexity in the microcode

program size is smaller

many addressing modes

less memory needed

Front 29

RISC

Back 29

Many general purpose registers

Complexity is in the compiler

simple same size instructions

optimizing the pipeline

requires more instructions

Front 30

What does intellectual property play in VLSI design

Back 30

Licensing and royalties on the designs pevent customers from adopting ideas for their products.

Front 31

What are the tradeoffs design engineers make when making controllers?

Back 31

Maximize performance given the constraints of existing technologies and market. best design is when memory,hardware and software is balanced.

Front 32

Describe the factors in measuring design performance for embedded controllers? Which factor has the most impact on performance?

Back 32

Processor or silicon tech

ISA or hardware optimizations

few instructions increase performance

(75% processing time and 10% of instructions)

Front 33

What is locality? Why is locality important for microprocessor design?

Back 33

A program executes a sequence of instruction and then branches

A program processes a sequential data set

Even though memory has increased at the same rate as processors, DRAM is still 10 times slower then processors

Front 34

What impact does the memory speed pyramid (register, cache, memory, file storage) have on microprocessors?

Back 34

They maximize the fetching of programs and fetching and storing of data

Front 35

How does cache work?

Back 35

When the processor request an address, the cache determines if its in the cache.

If it's a HIT then the cache supplies a program and the processor runs at full speed

If it's a MISS then the cache will fetch it from slower memory, idles the processor until it arrives.

Locality makes the cache get the next few addresses instructions

Front 36

What is pipelining? What is the problem with pipelining when a branch instruction is executed?

Back 36

Pipelining: logic is due to functionality. This means fetch, decode, execute sequence is paralleled. (instructions are sequential)

It is only when a branch is executed that the pipeline is incorrect and the processor will lose a cycle.