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7 Cards in this Set
- Front
- Back
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What does RISC stand for |
Reduced instruction set computers |
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Main reason why we use RISCe |
CPU design strategy based on the fact that a simplified instruction set provides a higher performance when combined with a micro-processor architecture capable of executing instructions using fewer microprocessor cycles per instruction |
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Examples of RISC processors |
Alpha AVR ARM processor PIC PA-RISC Power architecture Super computer |
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Where would you usually find RISC processors |
Found in phones and other portable devices |
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Characteristics of RISC |
Emphasis on software Single clock (reduced instruction set only) Register to register instructions are independent Low cycles per second; large code sizes Has more transistors for memory registers Pipelining available Only a restricted set of address modes available Less transistors so less power |
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Disadvantages |
Compiler has to do more work to translate high level code into machine code And more RAM is required to store the machine code instructions |
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Advantage |
Each instruction takes the same amount of time One clock cycle, four instructions will execute at least as fast as the single CISC instruction |
